[SMT-LIB] An SMT-Lib logic with fixed-size bit vectors _and_ rationals/floating-point numbers?

[Dejan Jovanović]

Cesare,

On 07/30/2014 04:30 PM, Martin Brain wrote:
> On Wed, 2014-07-30 at 22:33 +0000, Evgeny Roubinchtein wrote:
> selection is somewhat unusual.  The proposals for a new approach to
> logics are all a lot more regular.
For those of us who missed out on the SMT workshop, could you send out the slides you presented on SMT-LIB, or any notes on new proposals such as this one.

Dejan