MLRISC
MLRISC
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How to Obtain MLRISC
Overview
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MLRISC Based Compiler
MLRISC Intermediate Representation
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Optimizations for VLIW/EPIC Architectur...
Register Allocator
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Basic Types
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Machine Code Emitters


Machine Code Emitters
-Overview
-More Details

Overview

MLRISC lets the client to directly emit machine code and bypass the traditional assembly mechanism.

Machine code emitters in MLRISC satisfy the signature INSTRUCTION_EMITTER, which is defined as:

 signature INSTRUCTION_EMITTER =
 sig
 
    structure I : INSTRUCTIONS
    structure C : CELLS
    structure S : INSTRUCTION_STREAM
    structure P : PSEUDO_OPS
       sharing I.C = C  
       sharing S.P = P
 
    val makeStream : Annotations.annotations ->
                      ((int -> int) -> I.instruction -> unit,
                       unit,'b,'c,'d,'e) S.stream
 
 end
 
The function makeStream returns an instruction stream. The output, a stream of bytes, is direct to the client supplied structure which satisfy the CODE_STRING interface. This signature is defined as follows:
 signature CODE_STRING = sig
   type code_string
   val init          : int -> unit
   val update        : int * Word8.word -> unit
   val getCodeString : unit -> code_string
 end
 

More Details

Machine code emitters are automatically generated by the MDGen tool. Some specific generated emitters are listed below:
  1. Sparc
  2. Hppa
  3. Alpha
  4. Power PC
  5. X86

Lal George
Allen Leung
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Last modified: Thu Jan 9 19:38:15 EST 2003 by leunga@slinky