MLRISC
MLRISC
Contributors
Requirements
How to Obtain MLRISC
Overview
Problem Statement
Contributions
MLRISC Based Compiler
MLRISC Intermediate Representation
MLRisc Generation
Back End Optimizations
Register Allocation
Machine Description
Garbage Collection Safety
System Integration
Optimizations
Graphical Interface
Line Counts
Systems Using MLRISC
Future Work
System
Architecture of MLRISC
The MLTREE Language
MLTree Extensions
MLTree Utilities
Instruction Selection
Assemblers
Machine Code Emitters
Delay Slot Filling
Span Dependency Resolution
The Graph Library
The Graph Visualization Library
Basic Compiler Graphs
The MLRISC IR
SSA Optimizations
ILP Optimizations
Optimizations for VLIW/EPIC Architectur...
Register Allocator
Back Ends
The Alpha Back End
The PA RISC Back End
The Sparc Back End
The Intel x86 Back End
The PowerPC Back End
The MIPS Back End
The TI C6x Back End
Basic Types
Annotations
Cells
Cluster
Client Defined Constants
Client Defined Pseudo Ops
Instructions
Instruction Streams
Label Expressions
Labels
Regions
Regmap

Assemblers


Assemblers
-Overview
-Redirecting the Output
-More Details

Overview

Assemblers in MLRISC satisfy the signature INSTRUCTION_EMITTER, which is defined as:
 signature INSTRUCTION_EMITTER =
 sig
    structure I : INSTRUCTIONS
    structure C : CELLS
    structure S : INSTRUCTION_STREAM
    structure P : PSEUDO_OPS
       sharing I.C = C
       sharing S.P = P
 
    val makeStream : Annotations.annotations ->
                      ((int -> int) -> I.instruction -> unit,
                       unit,'b,'c,'d,'e) S.stream
 end
 
The function makeStream returns an instruction stream. By default the output is bound to the stream AsmStream.asmOutStream defined in the structure AsmStream at creation time.

The structure AsmStream satisfy the following signature.

 signature ASM_STREAM = sig
   val asmOutStream : TextIO.outstream ref
   val withStream : TextIO.outstream -> ('a -> 'b) -> 'a -> 'b
 end
 

Redirecting the Output

It is possible to redirect the output of an instruction stream. For example, the following statement
    val asm = makeStream []
 
binds the output of asm to AsmStream.asmOutStream, which by default is just TextIO.stdOut. On the other hand, the statement
    val asm = AsmStream.withStream mystream makeStream []
 
binds the output of asm to mystream.

More Details

Assemblers are automatically generated by the MDGen tool. Some specific generated assemblers are listed below:
  1. Sparc
  2. Hppa
  3. Alpha
  4. Power PC
  5. X86

Lal George
Allen Leung
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Last modified: Thu Jan 9 19:38:15 EST 2003 by leunga@slinky