V22.0436 - Prof. Grishman
Lecture 14: MIPS Processor Design: Data Paths and Single Cycle Control
Text: Section 4.3- 4.4
Combining data paths
We have seen the data paths needed for the individual types of
To construct a complete data path for our machine, we combine
data paths, using multiplexers where necessary (Fig. 4.11).
Data paths and control
These data paths require various control signals: register numbers,
control for memories and registers, function for ALU, select lines for
registers. The values of these control signals must be determined based
on the instruction being executed.
The instructions we are considering (lw, sw, beq, add, sub, and, or,
slt) are stored in three instruction formats (Fig. 4.14). The opcode of
the instruction is stored in the high 6 bits (bits 26 to 31). However,
the R-type instructions all are assigned opcode 0, and are
by the "function" field, bits 0 to 5 of the instruction.
The register numbers are stored in the same place in all these
and so we can connect the instruction fields (the output of the
memory) directly to the register number inputs on the register file. We
need one multiplexer, however, since the number of the register to
sometimes appears in the rd field, bits 11 to 15 (for R-type
and sometimes in the rt field, bits 16 to 20 (for load instructions).
produces the circuit shown in Fig. 4.15.
We must construct logic to control the ALU functions plus the following
control lines (see Fig. 4.16): MemRead, MemWrite, ALUSrc, RegDst,
PCSrc, and MemtoReg.
We construct a truth table in which the inputs are the instruction
specifically, the opcode and function fields --- and the outputs are
control signals and ALU function. P&H do this in two steps: The
signals (exclusive of ALU function) are determined by the opcode alone.
The dependence is shown in Figure 4.18. P&H then define a two-bit
called ALUOp, which is a function of the opcode. The ALU control signal
truth table is then based on two inputs: ALUOp and the function field
Building the Control Unit
We then have to convert these two truth tables to
combinational logic. P&H do this in Appendix D, section
2. For the main control unit, we use standard sum-of-products
logic. The full truth table, with opcode inputs and control
signal outputs, is shown in Figure 4.22. The resulting circuit is
shown in Figure D.2.5. For the
ALU control unit, we take advantage of the don't cares in the truth
table to produce a simple circuit, shown in Figure
Combining these circuits with the data path produces a complete
computer (Figure 4.17).